This invention relates to a receiver interface circuit and more particularly to a receiver interface circuit accepting serial wideband data from an RF terminal and converting the data into a format compatible with down stream computer processing.
In the mid-80""s the challenge was to develop telemetry systems and technology to meet increasingly sophisticated processing requirements of bit stream data in a commercial remote sensing system. Today, commercial remote sensing system operators foresee an increasing number of commercial, both operational and planned, satellite missions requiring processing of high data rates representing a significantly large volume of image information. With the increasing number of satellites, the problem of rapidly and accurately ingesting data from multiple or concurrent satellite passes increases exponentially. Heretofore, data received from commercial remote sensing systems was stored on high density digital tapes. The data from these tapes was transcribed offline from this old and increasing expensive media.
At the present time, computers and digital technology have advanced to a point where it is possible to directly capture down link data onto a computer bus and subsequently onto tape. Framed data can then be transferred to computer readable tape offline.
Thus, there is developed a requirement for real time processing of bit stream data in a commercial remote sensing system from the antenna receiver to the analyzing computer.
In accordance with the present invention, there is provided a receiver interface circuit incorporated into a communication and image processing network of a commercial remote sensing system (CRSS). The function of the receiver interface circuit is to accept serial wideband data from an RF terminal of an antenna system at a high data rate and convert the data into a format compatible with computer processing. The receiver interface circuit is part of an RF subsystem within the CRSS ground system and receives down link data from a satellite. In a typical application, the down link data is transmitted to the ground station as a single X-band carrier having quadrature phase shift keying modulation. The receiver interface circuit accepts the X-band signal from the antenna system, demodulates the signal, and outputs two serial data signals.
A receiver interface circuit in accordance with the present invention accepts one of two serial data signals and a clock signal from an RF receiver and converts this data for acceptance by a processing computer. The receiver interface circuit buffers the input data in memory for transferring directly into the memory of the processing computer.
In accordance with the present invention, a signal receiver interface circuit includes a frame synchronization module that receives an input data bit stream and analyzes the bit stream for synchronization bit patterns to identify frame synchronization. Following frame synchronization identification, the input data bit stream transfers to a wideband frame synchronization module to identify bit stream synchronization. Following frame synchronization and bit stream synchronization, the input data bit stream is stored in a memory buffer module for processing to a downstream computer. To transfer the stored input data bit stream to the downstream computer, a bus interface couples to the memory buffer module for transferring the stored data bit stream for processing and analysis.